This invention relates to a transistor power amplifier having a bias circuit with temperature compensation.
A transistor power amplifier is normally provided with a bias circuit having temperature compensation capability in order to prevent shifting of the operating point of power transistors resulting from changes in ambient temperature and self-heating of the power transistors. For example, as shown in FIG. 1, a class B power amplifier having NPN transistors Q1, Q2, Q3 and PNP transistors Q4, Q5, Q6 connected in a complementary SEPP (single-ended push-pull) configuration is provided with a bias circuit 1 with temperature compensation connected between the bases of the transistors Q1 and Q4 so as to flow a substantially constant idle current through each of transistors Q1 through Q6. Among the transistors Q1 through Q6, the transistors Q3 and Q6 are power transistors which handle a fairly large power. The bias circuit 1 is comprised of resistors 2 and 3 connected in series between the bases of transistors Q1 and Q4 and an NPN transistor Q7 having its base connected to the connection point between the resistors 2 and 3 and its collector-to-emitter path connected between the bases of transistors Q1 and Q4. The transistor Q7 is thermally coupled with one of the power transistors Q3 and Q6 (the transistor Q3 in this example). The thermal-coupling between the transistors Q3 and Q7 is usually achieved by mounting the case of transistor Q7 on the case of transistor Q3.
Being responsive to a change in the base-to-emitter voltage V.sub.BE of transistor Q7 with temperature, the bias circuit 1 varies the base-to-base voltage of transistors Q1 and Q4 such that a change in the base-to-emitter voltage V.sub.BE of each of transistors Q1 to Q6 resulting from a change in temperature is offset to flow a constant idle current through each of transistors Q1 to Q6.
This temperature compensation prevents the destruction of transistors resulting from thermal runaway thereof and the occurrence of crossover distortion resulting from the shortage of idle current.
A change in the junction temperature of a transistor arises mainly from three factors: (1) a change in ambient temperature; (2) self-heating of the transistor at zero signal condition due to the collector power dissipation resulting from the idle current; and (3) self-heating of the transistor due to the collector power dissipation when an AC power output is delivered to a load. The circuit of FIG. 1 can effectively achieve the temperature compensation for the above-mentioned factors (1) and (2). However, the temperature compensation for the factor (3) cannot be effectively achieved because the circuit of FIG. 1 is arranged to detect only the case temperature of the power transistor Q3.
Namely, the collector power dissipation, in other words, the junction temperature T.sub.j of the power transistor increases much more at signal input conditions than at zero signal condition. As a result, the junction temperature T.sub.j becomes much higher than the case temperature Tc. Difference between T.sub.j and T.sub.c approximately equals the product of the collector power dissipation P of power transistor and the thermal resistance .theta..sub.jc between the transistor junction and the transistor case. Since the thermal resistance .theta..sub.jc is constant, T.sub.j -T.sub.C is proportional to the collector power dissipation of the power transistor. This means that the junction temperature of the power transistor greatly varies with collector power dissipation as compared with the case temperature of the power transistor. In other words, a change in V.sub.BE of the power transistor Q3 is much greater than a change in V.sub.BE of the temperature compensating transistor Q7. With the circuit of FIG. 1 which detects only the case temperature of the power transistor Q3, therefore, it is substantially impossible to effectively achieve the temperature compensation for changes in junction temperature of the power transistor with collector power dissipation. As a result, crossover distortion will occur due to the shifting of the operating point of power transistor.